1. Field of the Invention
The present invention relates generally to computer systems and, more particularly, to an apparatus and method for tuning an on-chip filter used in transmitting signals, that meet government emission standards, from a computer system to a transmission medium.
2. Description of the Related Art
Many computer systems today are utilized in a networked configuration where each networked computer can transmit data to other computers on the same network. Various systems and related protocols have been developed over the years to implement such networks, such as Token Ring, Ethernet, and ATM. Depending upon which network is being used, certain requirements must be met, such as the types of hardware used and particular data characteristics.
The Ethernet local area network (LAN) is one of the most popular and widely used computer networks in the world. Since the beginnings of the Ethernet in the early 1970""s, computer networking companies and engineering professionals have continually worked to improve Ethernet product versatility, reliability and transmission speeds. To ensure that new Ethernet products were compatible and reliable, the Institute of Electrical and Electronic Engineers (IEEE) formed a working group to define and promote industry LAN standards. Today, the IEEE has various Ethernet working groups that are responsible for standardizing the development of new Ethernet protocols and products under an internationally well known LAN standard called the xe2x80x9cIEEE 802.3 standard.xe2x80x9d
Currently, there are a wide variety of standard compliant Ethernet products used for receiving, processing and transmitting data over Ethernet networks. By way of example, these networking products are typically integrated into networked computers, network interface cards (NICs), routers, switching hubs, bridges and repeaters. Until recently, common data transmission speeds over Ethernet networks were 10 megabits per second (Mbps). However, to meet the demand for faster data transmission speeds, in May 1995 the IEEE 802.3 standards committee officially introduced another standard, the xe2x80x9cIEEE 802.3u standard,xe2x80x9d for a 100BASE-T system capable of performing data transmissions at up to about 100 Mbps. When operating with unshielded twisted pair (UTP) cable as a transmission medium, these networks are commonly referred to as 10BASE-T and 100BASE-T networks.
FIG. 1A is a diagrammatic representation of two computers 102, 104, which are connected through a network 105. The network 105 can include, for example, other computers, network hubs, network routers, servers or the like. Of course, a single cable connecting the computers 102 and 104 can alternatively be used. Each computer 102 and 104 includes systems to facilitate exchange of information to and from the computer. These systems are diagrammatically illustrated by an open systems interconnection (OSI) layered model 106, that was developed by the International Organization for Standards (ISO) for describing the exchange of information between layers. The OSI layered model 106 is particularly useful for separating the technological functions of each layer, and thereby facilitating the modification or update of a given layer without detrimentally impacting the functions of neighboring layers.
Multiple layers (not shown) defined in the OSI model 106 are responsible for various functions, such as providing reliable transmission of data over a network; routing data between nodes in a network; and initiating, maintaining and terminating a communication link between users connected to the nodes. In addition, these layers are responsible for performing data transfers within a particular level of service quality; controlling when users are able to transmit and receive data depending on whether the user is capable of fall-duplex or half-duplex transmission; translating, converting, compressing and decompressing data being transmitted across a medium; and providing users with suitable interfaces for accessing and connecting to a network. Further, the lower portion of the OSI model 106 includes a media access control layer (MAC) 107 which generally schedules and controls the access of data to a physical layer (PHY) 108.
At a lowermost layer of OSI model 106, PHY layer 108 is responsible for encoding and decoding data into signals that are transmitted across a particular medium, such as a cable 110. To enable transmission to a particular medium, the PHY layer 108 includes a physical connector which is configured and operable to receive the cable 110. Also, the cable 110 can take various forms, including that of an unshielded twisted pair (UTP) cable.
When signals are passed through the cable 110 from the PHY layer 108, the potential exists for portions of the signal to emit from the cable 110 when it is an unshielded type, such as a UTP cable. More specifically, the portions which may emit from the cable typically are high frequency components of the signal. Because such emissions can interfere with other electrical devices in the vicinity of the cable 110, the U.S. government has developed stringent emission standards (commonly known as FCC Class A Requirements) to avoid such interference. To comply with such standards, in a the PHY layer the high frequency signal components are typically removed from the primary signal before transmission on the cable 110. As is known in the art, this is commonly referred to as transmit pulse shaping that is followed by reconstruction filtering.
Ethernet transmitters have typically utilized a configuration such as that shown in FIG. 1B to remove high frequency components from the signal before transmission through cable 110. FIG. 1B schematically depicts one PHY application of an Ethernet device, specifically an Ethernet card 150. The Ethernet card 150 includes a PC board 152 on which a transmission system, formed by various components, is mounted. Included in these components is a packaged silicon chip 154, a filter 156, a transformer box 158, and a connector 160.
The packaged silicon chip 154 is configured to convert the input binary data from the host (e.g., a computer into which the Ethernet card 150 is mounted) to a signal that can be transmitted to the cable 110. This typically is accomplished by a data converter such as a Manchester encoder 162 and a digital-to-analog converter (DAC) 164 that is integrated on the packaged silicon chip 154. These devices alternatively can be located on separate semiconductor chips that are each mounted onto the PC board 152.
The Manchester encoder 162 outputs a signal having voltage swings that correspond to the binary data. The DAC 164 then converts the digital signal voltage from the Manchester encoder 162 to an analog signal voltage utilizing a reference voltage, Vref 165. Unfortunately, due to power supply or manufacturing process variations, the reference voltage level that is internally generated can vary by as much as about 20%, which can lead to inaccurate and inconsistent signals. In an Ethernet system, this would result in not matching an xe2x80x9cEthernet eyexe2x80x9d template, which is a desired Ethernet transmission characteristic.
Electrically connected to the packaged silicon chip 154, the filter 156 operates to remove the high frequency components from the signal passed from the silicon chip 154. This is accomplished by tuning the filter, i.e., setting a cut-off frequency of the filter 156, with frequencies below the cut-off frequency being passed by the filter 156. More specifically, the cut-off frequency can be determined through characteristics of the components which form the filter. Unfortunately, the cut-off frequency will vary with variations in the filter component characteristics; thus large filter component variations can undesirably lead to large cut-off frequency variations. Alternatively, the cut-off frequency can be set by phase-locked loop (PLL) tuning that is well know to those skilled in the art. Unfortunately, though, PLL tuning is often highly complex, potentially adding cost and compromising reliability, and can consume high levels of power. Finally, cut-off frequency can be set by external resistor tuning which typically uses lower amounts of power, and is less complex to implement.
External resistor tuning includes the use of an off-chip resistor to generate bias voltages with a bias circuit, forming a tuning cell. The bias circuit typically is configured such that the bias voltages, and therefore the cut-off frequency, vary with variation of the external resistor resistance. However, such systems may be prone to stability problems. More specifically, a parasitic coupling capacitance Cp that exists due to the physical connection between a feedback bias circuit and external resistor, is shorted out at high frequencies. When the Cp shorts, the bias circuit is caused to have a loop gain that grows beyond unity. Consequently, because the loop gain of the tuning cell continues to grow beyond unity, precise control of the aforementioned cut-off frequencies will not be possible.
Typically, the filter 156 is formed from discrete components located on the PC board 152, such as inductor components 166 and capacitor components 168 used to form an inductor-capacitor (LC) low pass filter, as shown in FIG. 1B. Because discrete components typically require a substantial amount of PC board 152 area for proper layout and routing, the filter 156 tends to occupy a much larger area on the PC board 152 relative to the space utilized by the Manchester encoder 162 and DAC 164 of the packaged silicon chip 154.
The filtered signal passes from the filter 156 through a transformer 170 in transformer box 158, and then to the connector 160 which is configured to receive the cable 110. Although some typical Ethernet systems use a separate filter and a separate transformer, other systems may be in the form of a single module (not shown), which physically incorporates both the filter 156 and transformer 170.
Unfortunately, typical systems do not adequately control the impedance of the signal transmitted to the cable 110 with on-chip resistors which are subject to fabrication variations. Without adequate impedance control, the output voltage levels, specifically the peak-to-peak voltage level (Vpp), may vary beyond acceptable levels. By way of example, for transmission over differential pair lines, such as a UTP cable, such variation may be undesirable, resulting in poor transmission characteristics.
In addition to the components depicted in FIG. 1B, the PC board 152 typically includes several other components. For example, the PC board 152 may further include a processor, terminal circuitry, wiring, routing, connectors to the host (e.g., a computer system), and other semiconductor chips for performing the functions of other layers of the OSI model 106. Also, many of these components require their own routing and integration elements, which uses more space on the PC board 152. Further, as additional functions and components are developed, more space will be needed on the PC board to accommodate those components.
In addition, the marketplace is driving the development of increasingly smaller computers, requiring corresponding decreases in various computer components. This includes a desire to decrease the size of Ethernet systems, such as Ethernet cards. However, any decrease in size of such systems is limited by the relatively large area necessary for routing and integrating the discrete components of the filter 156.
In view of the foregoing, there is a need for methods and apparatuses for Ethernet signal transmission that will utilize less space than current systems. Further, it is desired to have a method and apparatus that better controls the impedance of the signal that is output to a transmission cable. It is also desirable to have a method and apparatus that responds more robustly to power supply and manufacturing process variations that may cause the internally generated voltage to vary by up to about 20%. In addition, it is desired to have a method and apparatus by which the filter cut-off frequency can be set while limiting cut-off frequency variation, maintaining tuning stability at high frequencies, limiting complexity, and limiting power consumption. This is particularly needed as faster and more stable transmission rates are demanded by newer generation transceivers.
Broadly speaking, the present invention fills these needs by providing an apparatus and method for current-mode transmission of Ethernet signals onto a cable, with output impedance control and on-chip filtering that is tuned using an external resistor in conjunction with compensation. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a transmission system for passing a signal, representing data from a computer system, to a transmission cable, includes a filter, located on a complementary metal-oxide-semiconductor (CMOS) chip, for removing high frequency components from the signal and passing other components of the signal. The filter is configured to receive the signal representing data from the computer system and configured to output a filtered signal to the transmission cable. The transmission system further includes a tuning cell with compensation that is electrically connected to the filter for setting a cut-off frequency of the filter. Preferably, the compensation is accomplished by a low pass filter that is included in the tuning cell.
In another embodiment, a method for making a transmission system for communicating data from a host through a transmission medium includes integrating a filter, on a CMOS chip, that is configured to remove particular portions of a filter input signal, that represents the data, and to pass remaining portions as a filtered signal, with the particular portions being determined relative to a cut-off frequency. The method further includes integrating a tuning cell onto the CMOS chip, the tuning cell being configured to set the cut-off frequency. In addition, the tuning cell is further integrated with a stability damping circuit.
In yet another embodiment of the present invention, an apparatus for transmitting data from a computer system to a transmission medium includes a means for removing particular components of an input signal and passing other components of the input signal. The means for removing particular components is integrated on a complementary metal oxide-semiconductor (CMOS) chip and the particular components are determined by a cut-off frequency. The apparatus further includes a means for setting the cut-off frequency, that is at least partially incorporated on the CMOS chip such that the means for setting the cut-off frequency includes a stabilization means.
One advantage of the present invention is that less PC board space is used by the Ethernet transmitter. More specifically, because the filter is integrated on-chip, the space typically used by discrete components for the filter is not needed. Thus, the unused space can either be used by additional components on the PC board, or the size of the PC board itself can be reduced. Also, by avoiding the use of discrete components, the cost of the device is correspondingly decreased. In one embodiment of the present invention, the cost of a system is dramatically reduced by integrating the entire transmitter system on-chip, which should be contrasted with the cost of a transmitter system that requires PC board integrated discrete components. In some cases, the total cost of the transmitter system can increase by more than 20 times when discrete components are conventionally used to perform the filtering functions.
An additional advantage of the present invention is that the signal transmission is more robust in response to variations in power supply and manufacturing processes because it operates in current mode. In particular, this results in more consistent transmission signal levels being output to the Ethernet cable, for example. As a further advantage of the present invention, the output impedance is accurately controlled while converting the signal from current to voltage with the proper signal levels, including the proper peak-to-peak voltage (Vpp).
The present invention further advantageously provides for on-chip filter tuning while limiting cut-off frequency variation, complexity, and power consumption and maintaining tuning stability at higher frequencies.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.